As an example of an analog-to-digital converter according to the related art, a digital calibration pipelined of analog-to-digital converter is disclosed in “Least Mean Square Adaptive Digital Background Calibration of Pipelined Analog-to-Digital Converters” written by Y. Chiu et al., IEEE Transactions on Circuits and Systems I Vol. 51, pp. 38-46, 2004.
Further, the improvement of digital calibration type pipelined analog-to-digital converter in order to perform convergence of the calibration in the digital calibration type pipelined analog-to-digital converter at a higher speed according to the above “Least Mean Square Adaptive Digital Background Calibration of Pipelined Analog-to-Digital Converters” is disclosed in “Fast Digital Background Calibration for Pipelined A/D Converters” written by Takashi Oshima et al., The institute of Electronics, Information, and Communication Engineers, Technical Report of IEICE, VLD 2006-138, 2007.
As an example of the digital calibration type an analog-to-digital converter, in addition to the configuration disclosed in the above “Least Mean Square Adaptive Digital Background Calibration of Pipelined Analog-to-Digital Converters” and in the above “Fast Digital Background Calibration for Pipelined A/D Converters”, a configuration that uses a pseudonoise signal without using a reference analog-to-digital converter is disclosed in “A 15 b-Linear, 20 MS/s, 1.5 b/Stage Pipelined ADC Digitally Calibrated with Signal-Dependent Dithering” (written by Y. S. Shu et al., 2006 Symposia on VLSI Technology and VLSI Circuits Session C25-1, 2006.
As an example of the related art, a successive approximation analog-to-digital converter that obtains a binary capacitance value that is used for a capacitive network by randomly selecting plural small unit capacitors, each having the equal capacitance value is disclosed in U.S. Pat. No. 5,006,854.
An example of the related art, an A/D converter that corrects an A/D conversion error caused by an error of a capacitance value of a capacitor array using a dummy capacitor arranged at the outside of a capacitor array is disclosed in JP-A-05(1993)-235768.
As another example of the related art, JP-A-04(1992)-165822 discloses an A/D converter in which a signal to be converted is input to a capacitor. The A/D converter includes a circuit that switches the input capacitor, and adjusts an amplitude level of the signal to be converted to output a low amplitude signal and a high amplitude signal with a constant resolution.
As still another example of the related art, a charge reallocation type AD converter that includes a correction unit only using some of capacitor arrays among the capacitor arrays is disclosed in JP-A-03(1991)-206728.